The Influence of the Nanometer Technology on Performance of CPL Full Adders
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| Title | The Influence of the Nanometer Technology on Performance of CPL Full Adders |
| Authors | |
| Abstract | In this paper the performance of 8-transistor based Full adder is analyzed, evaluated, and compared with that of three different types of Full Adders based on Complementary Pass Transistor XOR Logic gate. Simulation results using nano-scale SPICE parameters are obtained for the above mentioned FAs. It is shown that the performance of the 8-transistor based Full adder in term of power dissipation is superior to that of the other FAs. Multi- Supply Voltage Technique is used to optimize the outputs of 8-Transistor Full Adder. A new technique based on minimum leakage vector is proposed to reduce the leakage current when the circuit is in its off state. |
| Publisher | ACADEMY PUBLISHER |
| Date | 2010-03-01 |
| Source | Journal of Computers Vol 5, No 3 (2010) |
| Rights | Copyright © ACADEMY PUBLISHER - All Rights Reserved.To request permission, please check out URL: http://www.academypublisher.com/copyrightpermission.html. |