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Configuration scheme for small scale Multi-FPGA systems
Journal Title Journal of Computers
Journal Abbreviation jcp
Publisher Group Academy Publisher
Website http://ojs.academypublisher.com
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Title Configuration scheme for small scale Multi-FPGA systems
Authors Yan, Dangui; Li, Changyong; Yang, Lisheng; Zhang, Chengchang
Abstract Multi-FPGA systems have tremendous potential, providing a high-performance computing substrate for many different applications. These systems harness multiple FPGAs, connected in a fixed pattern, to implement complex logic structures.  In order to use such a system effectively, it is a key for constructing a good performance hardware platform. The configuration scheme is an important part in hardware design. This paper aims at small scale Multi-FPGA systems composed of SRAM-based FPGAs developed by Xilinx Corporation,  proposes a novel configuration technique by using Platform Flash PROM XCF32P. Using this scheme, only adopting one XCF32P and one Complex Programmable Logic Device (CPLD) we can configure four FPGAs with monolithic configuration data smaller than 8Mbit. When the number of FPGA is more than four, Design revisioning allows the user to cascade more XCF32P PROMs to realize. Since Xilinx Platform PROM and Xilinx FPGA/CPLD are used to get a single-vender solution, the design for hardware and software is simplified.
Publisher ACADEMY PUBLISHER
Date 2011-08-01
Source Journal of Computers Vol 6, No 9 (2011): Special Issue: Changes in Computer Application for Economic Analysis of Law and
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