Design of High-Speed Parallel Data Interface Based on ARM & FPGA
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| Title | Design of High-Speed Parallel Data Interface Based on ARM & FPGA |
| Authors | |
| Abstract | This article described a complete design of parallel interface based on ARM & FPGA, using the on-chip DPRAM in FPGA to improve the metastability problem which was generated during data transmission between the asynchronous clock-domains; And it achieved the design of ARM & FPGA hardware interface module , data-sending module , data-receiving module and FPGA driver module , also gave the feasible method that using a flag to solve the dislocation of data-reading; Test results indicate that the system works steadily. |
| Publisher | ACADEMY PUBLISHER |
| Date | 2012-03-01 |
| Source | Journal of Computers Vol 7, No 3 (2012): Special Issue: Selected Papers of the 13th International Conference on Computer |
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