The Hardware Design of Parameter-Adjustable FIR Filter System
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| Title | The Hardware Design of Parameter-Adjustable FIR Filter System |
| Authors | |
| Abstract | This design using FPGA parallel architecture, high computing speed and high-speed reliability of USB2.0 interface, designed an FPGA + USB2.0 + computer FIR digital filter system, organically combining the speed of FPGA and flexibility of Computer through USB2.0 bus. The results demonstrated that the coefficients configuring of the system is easy, which can adjust the filter coefficients flexibly according to the actual demand, that it can effectively filter out the noise signals. |
| Publisher | ACADEMY PUBLISHER |
| Date | 2013-05-01 |
| Source | Journal of Computers Vol 8, No 5 (2013): Special Issue of Selected papers of ICAEE 2011 and ICCIT 2011 |
| Rights | Copyright © ACADEMY PUBLISHER - All Rights Reserved.To request permission, please check out URL: http://www.academypublisher.com/copyrightpermission.html. |