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Toward a Low Cost and Single Chip Holter: SoC-Holter
Journal Title Journal of Networks
Journal Abbreviation jnw
Publisher Group Academy Publisher
Website http://ojs.academypublisher.com
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Title Toward a Low Cost and Single Chip Holter: SoC-Holter
Authors Zhou, Hai-ying; Sun, Hong; Lecoq, Jacques; Bohner, Gerard; Ding, Hao; Hou, Kun-mean
Abstract In spite of the rapid development of medicine, cardiovascular diseases are still the number one killer in the world. In France every year more than 50,000 people die suddenly due cardiac arrhythmias. Identification of high risk sudden death patient is still a challenge. To detect the cardiac arrhythmias, currently Holter is generally used to record 1~3 leads ECG (electrocardiogram) signals during 24h to 72h. However the use of Holter is limited among the population due to its form factor (not user-friendly) and cost. In this paper, we propose an integrated single chip wearable Holter named SoC-Holter, which enables to record 1~4 leads ECG. This single chip SoC-Holter is relied on adequation algorithm architecture design methodology. To minimize energy consumption, CMOS technology (0.35µm) is used to prototype the first implementation and test. The SoC-Holter has the following functions: signal conditioner and preamplifier, amplifier and filters, analog to digital converter, and Nano-controller. The low pass filter is composed of current division, degeneration and common-mode feedback circuits added to fulfill the required performance. The analog circuits are implemented, tested and validated. The digital bloc is simulated, implemented and tested. It seems that an integrated, low cost, and user-friendly single chip Holter is feasible. Consequently large number of high risk populations such as heavy smoker and obese may be monitored.  This SoC-Holter consumes less than 10mW while the device is operating.
Publisher ACADEMY PUBLISHER
Date 2011-02-01
Source Journal of Networks Vol 6, No 2 (2011)
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